Additionalinformation

Additional Information

Our salary ranges are determined by role, level, and location, and the range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations. Within the range, individual pay is determined by work location, role-related knowledge and skills, depth of experience, relevant education or training, and additional role-related considerations.

Depending on the position offered, equity, bonuses, commission, or other forms of compensation may also be provided as part of a total compensation package, in addition to a full range of medical, financial, and other benefits.

WE ARE AN EQUAL OPPORTUNITY EMPLOYER

At Silvaco, we do not discriminate based upon race, religion, color, national origin, gender (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics.

If you need assistance or an accommodation due to a disability, please contact us at 408.567.1000.

https://www.silvaco.com/

Companydescription

Company Description

About Silvaco, Inc.

For over four decades, Silvaco, based in Silicon Valley, California and with global locations around the world has solved semiconductor design challenges by offering affordable and competitive TCAD (Technology Computer Aided Design) software, EDA (Electronic Design Automation) software, proven design IP (intellectual property), and world class support to engineers and researchers across the globe. Silvaco solutions span from atoms to systems: starting with simulation of material behavior impacting semiconductor devices, to design and analysis of transistor circuits, and lastly providing IP blocks for systems-on-chip (SoC) designs. Our solutions are deployed in production flows across broad industry segments such as leading display companies, automotive OEM suppliers, and top Memory, 5G, and IoT (internet of things) providers.

Jobdescription

Job Description

As a junior engineer, you'll work across a diverse software portfolio—improving UIs, adding optimization workflows, fixing C++ bugs, and building MCP servers for LLM integration—rather than being tied to one product.

You will work across our software portfolio rather than on a single product. On any given week that might mean improving the UI of a simulation control tool, adding a new optimisation workflow, fixing a bug in a C++ codebase, or building an MCP server that exposes one of our tools to an LLM agent.

UI quality and AI-friendliness are both priorities here, and they reinforce each other. A well-designed tool with clear inputs, predictable behaviour, and informative feedback is easier for a scientist to use and easier for an LLM to drive reliably. You will think about both audiences. Part of your work will be making our existing tools usable by AI agents, designing tool interfaces that behave well when an LLM is at the controls, and building agent pipelines that integrate with our simulation workflows.

We also have new projects to start from scratch. As you build familiarity with the domain and demonstrate ownership, there is genuine opportunity to lead one of those projects end-to-end.

No prior background in simulation or optimisation is expected. The domain is learnable and we will support that process. What matters is that you are genuinely curious, pick things up quickly, and enjoy building tools that serious technical users depend on.

Qualifications

C++ Programming Language; BS in Computer Science or applicable experience; must be fluent in English.

Minimum 1-4 years experience in this type of role and preferably in the semi-conductor industry.